1. Field of the Invention
This invention relates generally to magnetic random access memory (MRAM) cells and array structures for spin moment transfer (SMT) MRAM cells. More particularly, this invention relates to SMT MRAM read reference circuits for determining a data state of selected SMT MRAM during a read operation.
2. Description of Related Art
The term spin moment transfer MRAM refers to a magnetic tunnel junction (MTJ) random access memory (RAM). In this context, the term “spin” refers to the angular momentum of electrons passing through an MTJ that will alter the magnetic moment of a free layer of an MTJ device. Electrons possess both electric charge and angular momentum (or spin). It is known in the art that a current of spin-polarized electrons can change the magnetic orientation of a free ferromagnetic layer of an MTJ via an exchange of spin angular momentum.
“A Novel Nonvolatile Memory with Spin-torque Transfer Magnetization Switching: Spin-Ram”, Hosomi, et al., IEEE International Electron Devices Meeting, 2005. IEDM Technical Digest. December 2005, pp.: 459-462, provides a nonvolatile memory utilizing spin-torque transfer magnetization switching (STS), abbreviated Spin-RAM. The Spin-RAM is programmed by magnetization reversal through an interaction of a spin momentum-torque-transferred current and a magnetic moment of memory layers in magnetic tunnel junctions (MTJs), and therefore an external magnetic field is unnecessary as that for a conventional MRAM.
A spin-torque MTJ element has two ferromagnetic layers and a spacer layer between the ferromagnetic layers. One ferromagnetic layer is a pinned magnetic layer and the other ferromagnetic layer is a free magnetic layer. The spacer layer is a tunnel barrier layer. When a spin polarized electron flows through the ferromagnetic layers, the spin direction rotates according to the directions of magnetic moment. The rotation of spin direction of the electrons in the ferromagnetic layers is the origin of a spin-torque to the magnetic moment. If the given torque is large enough, magnetization of ferromagnetic layer and thus the magnetic moment is reversed. The magnetization of the ferromagnetic layers transforms from parallel to anti-parallel alignment. This changes the MTJ element from a low resistance state to a high resistance state thus changing the logic state of the MTJ element from a first logic state (0) to a second logic state (1). A voltage source provides the programming voltage that generates the programming current that is reversed appropriately change the programming state of the MTJ element. Reading an SMT MRAM cell involves applying a voltage across the SMT MRAM cell and detecting the resistance (or current) difference.
As illustrated in FIG. 1, a spin moment transfer (SMT) MRAM cell 100 consists of an MTJ element 105 and a Metal Oxide Semiconductor (MOS) gating transistor 110. The MTJ element 105 is composed of a pinned ferromagnetic layer 102 and a free ferromagnetic layer 104, and a tunnel barrier layer 103. The drain of the gating transistor 110 is connected through a nonmagnetic layer to the pinned ferromagnetic layer 102. The free ferromagnetic layer 104 is connected to a bit line 115 and the source of the gating transistor 110 is connected the source line 120. The bit line 115 and source select line 120 are connected to the bipolar write pulse/read bias generator 125. The bipolar write pulse/read bias generator 125 provides the necessary programming current to the MTJ element 105 through the bit line 115 and the source select line 120. The direction being determined by logic state being programmed to the MTJ element 105.
The gate of the gating transistor 110 is connected to a word line 130. The word line 130 transfers a word line select voltage to the gate of the gating transistor 110 to activate the gating transistor 110 for reading or writing the logic state of the MTJ element 105. A sense amplifier 135 has one input terminal connected to the bit line and a second input terminal connected to a voltage reference circuit. When the word line 115 has the word line select voltage activated to turn on the gating transistor 110, the bipolar write pulse/read bias generator 125 generates a bias current that passes through MTJ element 105. A voltage is developed across the MTJ element 105 that is sensed by the sense amplifier 135 and compared with the reference voltage generator to determine the logic state written to the MTJ element 105. This logic state is transferred to the output terminal of the sense amplifier 135 as to the data output signal 145.
Arrays of spin moment transfer (SMT) MRAM cell 100 are arranged in rows and columns. Each row of the SMT MRAM devices may have their source line 120 commonly connected to a source line selection circuit or tied to a ground reference point. In other arrangements of an array of SMT MRAM cells 100, as shown in U.S. Patent Application 2006/0018057 (Huai), the SMT MRAM cells 100 are organized into an array having two bit lines. The two bit lines are structures such that the current flowing perpendicularly through the MTJ 105 is controlled by the difference of the bias voltages of the two bit lines for each spin moment transfer (SMT) MRAM cell 100. Two reading/writing column selection circuits are provided to control the voltages on the bit lines.